Beyond CMOS: Materials and Engineering

The present paper describes the recent developments in the device engineering for microelectronics and nanoelectronics. The perspectives for the future show a narrow margin in silicon technology. Hence Engineering in Devices and materials becomes a must. The investigation carried out illustrates the various materials technology that can lengthen the silicon technology lifetime and eventually bring alternative materials such carbon nanotubes. Introduction The developments of High Density Integrated Circuits (HDICs) is facing challenges in the further development aiming higher device performances mainly low power consumption and higher frequency operations. Usually, HDICs performances are improved by reducing the MOS transistor’s dimensions. MOSFETs dimensions are going down from submicron to nanometer figures. However, the drastic dimension reduction will not always comply with device performances if the basic silicon material is not engineered as it is illustrated in Fig.1 [1]. The present paper introduces the recent advances and the perspectives in the beyond CMOS era development both in materials engineering and technology aspects. Fig.1 Roadmap for Silicon and Beyond MOS HDIC Technology Engineered Devices Device shrinking led to device engineering such as submicron engineered MOSFET using the AHLATID, LDD, Large angle Tilt, LATID or drain engineered MOSFETs. ONO MOSFETs are introduced to increase the gate dielectric breakdown. This increase in dielectric strength is more pronounced using high k dielectric such as Hafnium oxide HfO2. Besides the engineered MOSFET, SOI (Silicon On Insulator) is an alternative technology to overcome short channel effects (especially hot carriers) in HDICs. SOI devices can be single or double gate, rectangular or surrounded gate. Bulk MOSFETs are featured to include drain halo doping to reduce impact ionization near the drain regions. New device technologies as shown in Fig.2 are introduced in the case of NanoMOSFETs, Ultrathin body MOSFET and ballistic MOSFETs in which electronic transport models are based on ballistic transport are the candidates for the future HDCIs. New current models [2] are investigated. Fig 2. Different Engineered MOS Devices Engineered Materials Silicon material reached its limits while shrinking device dimensions. The main characteristics that are needed in HDICs are the higher mobility, i.e., higher operating frequencies, low power dissipation and high temperature sustainability. In order to keep silicon as row material, engineered forms must be introduced to modulate certain characteristics sought in future devices. Two main engineered forms are being developed as shown in Fig.3a: SiGe and strained silicon. Figure 3b shows typical engineered MOSFETs both using S-Si and Si-Ge [3]. The engineered materials also called CMOS emerging materials can be associated to the previous engineering device technologies described above. This can stretch the life time of CMOS Engineering.